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This research proposes to use of LFSR to examine the random testing circuit for the sparse neural network implementation. An essential function of the LFSR is circuit testing. Data input is first directed to the LFSR block. Data storage in memory is the primary goal of LFSR. In the upcoming parallel method, data will be stored in registers in a parallel fashion using pseudo random registers. An address generator is now used to generate addresses for the stored data. The action indicated will be executed by the next command. Written data will be verified and recorded. The command generator will be used to repeat the operation if the data turns out to be flawed after verification. In contrast, testing circuits will be used to verify that the data is error-free before an output is produced. It is therefore possible to draw the conclusion that it will result in efficient outcomes in terms of area, speed, and delay based on the results.

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PseudoRandom Registers for Random Transistor Circuit Analysis in a Sparse Neural Network Using LFSR

  • 会议论文

  • 发表日期：

    2025年

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  • K. Shilpa,
  • M. Ravindran,
  • P. Ravi Kiran,
  • S. Krishnaveni,
  • X. S. Asha Shiny,
  • Sayyad Rasheeduddin

摘要

This research proposes to use of LFSR to examine the random testing circuit for the sparse neural network implementation. An essential function of the LFSR is circuit testing. Data input is first directed to the LFSR block. Data storage in memory is the primary goal of LFSR. In the upcoming parallel method, data will be stored in registers in a parallel fashion using pseudo random registers. An address generator is now used to generate addresses for the stored data. The action indicated will be executed by the next command. Written data will be verified and recorded. The command generator will be used to repeat the operation if the data turns out to be flawed after verification. In contrast, testing circuits will be used to verify that the data is error-free before an output is produced. It is therefore possible to draw the conclusion that it will result in efficient outcomes in terms of area, speed, and delay based on the results.