Currently, the market is witnessing the introduction of the first RISC-V development boards capable of running Linux. In the embedded sector, these boards could serve as alternatives to the commonly used ARM or x86-based platforms. Ongoing efforts are being made to enhance the real-time capabilities of the Linux kernel, allowing it to handle both time-critical and non-time-critical tasks with complex software stacks in so called Mixed-Criticality Systems (MCS). One project that may merge into the Linux kernel soon is PREEMPT_RT. PREEMPT_RT is a patch for the Linux kernel source code that enables low-latency real-time execution directly within the kernel. At the time of writing, RISC-V support has just been merged into the PREEMPT_RT patch series. The paper presents a comprehensive analysis of this new release on a RISC-V platform, utilizing an extensive collection of long-term measurement data generated for this study. It compares the Worst Case Latencies (WCL) to the results on a common ARM platform having the same configuration. The measurement environment is thoroughly described, providing a detailed explanation of all the necessary information for replicating the results, including tuning procedures.

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Real-Time Linux on RISC-V: Long-Term Performance Analysis of PREEMPT_RT Patches

  • Tobias Schaffner,
  • Jan Altenberg,
  • Stefan Wallentowitz

摘要

Currently, the market is witnessing the introduction of the first RISC-V development boards capable of running Linux. In the embedded sector, these boards could serve as alternatives to the commonly used ARM or x86-based platforms. Ongoing efforts are being made to enhance the real-time capabilities of the Linux kernel, allowing it to handle both time-critical and non-time-critical tasks with complex software stacks in so called Mixed-Criticality Systems (MCS). One project that may merge into the Linux kernel soon is PREEMPT_RT. PREEMPT_RT is a patch for the Linux kernel source code that enables low-latency real-time execution directly within the kernel. At the time of writing, RISC-V support has just been merged into the PREEMPT_RT patch series. The paper presents a comprehensive analysis of this new release on a RISC-V platform, utilizing an extensive collection of long-term measurement data generated for this study. It compares the Worst Case Latencies (WCL) to the results on a common ARM platform having the same configuration. The measurement environment is thoroughly described, providing a detailed explanation of all the necessary information for replicating the results, including tuning procedures.