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This chapter introduces the hASIC design obfuscation concept and emphasizes the trade-offs between design and security considerations. It begins by discussing the security-aware CAD flow, which involves various stages from RTL to layout. It also provides a detailed explanation of different phases within TOTe, the custom tool that generates an hASIC solution. Furthermore, it presents initial results from numerous designs, focusing on the PPA overheads. Recognizing that PPA is a critical factor in design optimization, the chapter introduces additional techniques included in the tool to decompose the LUTs and enhance the QoR. It highlights the analysis and experimental findings using the TOTe tool.

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A Security-Aware CAD Flow for Hybrid ASIC

  • 章节

  • 发表日期：

    2025年

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  • Zain Ul Abideen,
  • Samuel Pagliarini

摘要

This chapter introduces the hASIC design obfuscation concept and emphasizes the trade-offs between design and security considerations. It begins by discussing the security-aware CAD flow, which involves various stages from RTL to layout. It also provides a detailed explanation of different phases within TOTe, the custom tool that generates an hASIC solution. Furthermore, it presents initial results from numerous designs, focusing on the PPA overheads. Recognizing that PPA is a critical factor in design optimization, the chapter introduces additional techniques included in the tool to decompose the LUTs and enhance the QoR. It highlights the analysis and experimental findings using the TOTe tool.