TCAD Electrothermal Analysis of 3D GAAFET Structures for Future VLSI Circuits

The transition from planar to three-dimensional topology inevitably leads to downgrade in the thermal parameters of very large-scale integrated circuits (VLSI). To compare the thermal properties of VLSI built on different types of transistors, the authors developed TCAD models of the most promising types of nano-sized (5–2 nm or more) field-effect transistors for three-dimensional VLSIs: nanosheet field-effect transistor (NSFET), nanowire field-effect transistor (NWFET), vertical transport field effect transistor (VTFET). All models were analyzed from an electrothermal point of view and compared with a model of a traditional FinFET structure using TCAD simulation. It has been shown that, under equal conditions, the maximum temperature in new nanoscale FET structures can be approximately 30 K higher than in a FinFET because of self-heating. That can have an extremely negative impact on the reliability and lifetime of future generations of VLSI. So it is necessary to optimise the 3D FET structures, materials with low thermal conductivity and heat sink constructions.