Scholarlink

Hardware-aware neural architecture search (HW-NAS) is a powerful tool for the automatic design of tiny neural architectures able to fit the tight memory constraints of commodity electronics, like microcontroller units (MCU). However, new sensors equipped with neural processing units (NPUs) are reaching the market. In contrast to common MCUs, NPUs often do not feature the traditional division of the memory constraint between RAM and Flash usage. This is an issue for state-of-the-art HW-NAS, which are designed to fit the two constraints distinctly. This work proposes a novel HW-NAS for designing tiny Convolutional Neural Networks (CNNs) that can effectively deal with NPUs, achieving state-of-the-art results in just 5 h and 48 min on the Visual Wake Words dataset, a tinyML benchmark.

错误：搜索内容不能为空，请输入英文关键词
错误：关键词超出字数限制，请精简
高级检索

Supporting in-Sensor Computing with Hardware-Aware Neural Architecture Search

  • 会议论文

  • 发表日期：

    2025年

查看全文
  • Andrea Mattia Garavagno,
  • Edoardo Ragusa,
  • Rodolfo Zunino,
  • Antonio Frisoli,
  • Paolo Gastaldo

摘要

Hardware-aware neural architecture search (HW-NAS) is a powerful tool for the automatic design of tiny neural architectures able to fit the tight memory constraints of commodity electronics, like microcontroller units (MCU). However, new sensors equipped with neural processing units (NPUs) are reaching the market. In contrast to common MCUs, NPUs often do not feature the traditional division of the memory constraint between RAM and Flash usage. This is an issue for state-of-the-art HW-NAS, which are designed to fit the two constraints distinctly. This work proposes a novel HW-NAS for designing tiny Convolutional Neural Networks (CNNs) that can effectively deal with NPUs, achieving state-of-the-art results in just 5 h and 48 min on the Visual Wake Words dataset, a tinyML benchmark.