Efficient RNIC Cache Side-Channel Attack Detection Through DPU-Driven Architecture

Remote Direct Memory Access (RDMA) is increasingly favored for its high-bandwidth and low-latency communication capabilities in cloud environments. However, traditional RDMA network interface cards (RNICs) act as passive remote memory controllers and are susceptible to cache side-channel attacks. The Data Processing Unit (DPU) represents the latest evolution of the RNIC, integrating programmable logic with the RDMA engine. In this work, we propose a paradigm shift in detecting RNIC cache side-channel attacks from network-core programmable switches to end-host DPU. By leveraging the programmable logic of the DPU to accelerate cache-side channel attack detection, we demonstrate significant potential for enhanced performance and scalability. Our evaluation results show that the DPU-driven architecture can reduce detection latency by up to 98.7% compared to the state-of-the-art switch-centric architecture.