This chapter covers the implementation details for setting up a circuit for the placement and routing task from a single netlist-file. Such a netlist must follow the SPICE format and be composed of one top-circuit and optional subcircuits. First, the circuit instantiation process will be described, which includes the implementation details of the data structures for devices, nets and circuits. After that, primitive device compositions will be introduced and an annotation mechanism presented, used to detect them in a larger circuit. At the end of this chapter, the data structures and mechanism for capturing the cell views of the devices, generated by the VLSI layout tool Magic, will be presented.