This book has focused on various aspects of single-photon avalanche (SPAD) technology, particularly centering on perimeter gating and its performance in standard CMOS processes. Although the state of the art is dominated by traditional CMOS SPAD architectures, the experimental results shown herein set perimeter-gated SPADs as viable substitutes for these architectures and even as an alternative that confers additional functionality. For example, we have shown that perimeter readily confers the ability to alter breakdown voltages, allowing one to tighten breakdown voltage distribution in a large array by equalizing breakdown voltages across different SPAD pixels. Furthermore, we have shown that perimeter gating may also be used in a hardware security framework to leverage the underlying physically unclonable function of a pg-SPAD imager to create chip-specific signatures.