Optoelectronic Characteristics of Perimeter-Gated Single-Photon Avalanche Diodes
摘要
This chapter presents our findings on the Optoelectronic optoelectronic characteristics of perimeter-gated single-photon avalanche diodes ( \(\mathrm {pg}\) -SPADs) fabricated in standard CMOS processes. We show the effects of perimeter gating on the \(\mathrm {pg}\) -SPADs’ Dark count rate (DCR) dark count rate (DCR), Signal-to-noise ratioSNR signal-to-noise ratio (SNR), sensitivity, Spectral responsivity spectral responsivity, and photoresponse nonuniformity (PRNU). First, we investigated a \(\mathrm {pg}\) -SPAD fabricated in a \(0.5\mbox{-}\mu \mathrm {m}\) CMOS process. We show that this \(\mathrm {pg}\) -SPAD had an area-normalized DCR as low as \(2~\mathrm {Hz} / \mu \mathrm {m}^{2}\) at room temperature as a result of perimeter gating. Consequently, the \(\mathrm {pg}\) -SPAD’s SNR also increased by an order of magnitude. We further demonstrated that under high-illumination conditions, perimeter gating maximized SNR, whereas under low-light conditions, it maximized sensitivity. Our results revealed that perimeter gating strongly influenced the \(\mathrm {pg}\) -SPAD’s Spectral responsivity spectral responsivity by broadening the response over the visible range, confirming that perimeter gating does activate the diode’s volumetric junction. Furthermore, we investigated the Optoelectronic optoelectronic characteristics of an imager including a 64 \(\times \) 64 array of \(\mathrm {pg}\) -SPAD pixels fabricated in a \(0.35\mbox{-}\mu \mathrm {m}\) CMOS process. We show that perimeter gating reduced the imager’s mean room temperature DCR by two orders of magnitude and that it expanded pixel Spectral responsivity spectral responsivity over the visible range. Additionally, we show that high perimeter gating voltages significantly reduced the imager’s PRNU’s dependence on the pg-SPAD’s DCR. This chapter is largely based on its related publications (Dandin et al., IEEE Electron Dev. Lett. 33(4), 570–572 (2012), Dandin et al., Midwest Symposium on Circuits and Systems, vol. 2017, pp. 867–870 (August 2017), and Dehghandehnavi, Midwest Symposium on Circuits and Systems (2023), pp. 317–321), Copyright, IEEE.