Calculation of the Sigmoid Activation Function in FPGA Using Rational Fractions

In this paper, we consider implementations of the sigmoid activation function for artificial neural network hardware systems. A rational fraction number system is proposed to calculate this function. This form of data representation offers several benefits, including increased precision compared to integers and more straightforward implementation in a field programmable gate array (FPGA) than the floating-point number system. In contemporary FPGA applications, rational fractions excel in regard to their compact hardware size, high throughput, and the ability to adjust the precision through the selection of the data width. The proposed module for calculation of the sigmoid activation function is shown to have high throughput and to occupy a relatively modest hardware volume compared to modules relying on piecewise polynomial approximation with fixed-point data.