Scalable FPGA Implementation of Dynamic Programming for Optimal Control of Hybrid Electrical Vehicles

Dynamic programming (DP) can be used for optimal control of hybrid electric vehicles but requires a large number of computations to be performed. As many of these computations can be performed in parallel, FPGAs are an interesting platform for executing the dynamic programming algorithm. This paper presents a scalable architecture for performing dynamic programming on FPGAs using a pipelined model of a hybrid electric vehicle (HEV). The proposed architecture supports multiple parallel model execution units and is scalable to support a configurable number of units, inputs, states, and time steps. The run time of the optimization process is shown to be improved significantly compared to a CPU implementation. With four parallel model execution units, the design runs in about 1.5% of the time required for an Intel Xeon W-1250 CPU. This shows that DP-based optimal control is feasible for HEVs and that FPGAs can be used to achieve it.