Drawbacks of Programming Dataflow Architectures and Methods to Overcome Them

Compared to the control-flow paradigm dataflow paradigm is proven to be superior for certain classes of high-performance computing algorithms, such as AI. However, this comes with the cost. Many problems should be solved in order to efficiently utilize dataflow hardware. Some of them are programming dataflow architectures and debugging issues that arise during this process, relatively long simulation time, finding suitable dataflow hardware, and difficulties with the debugging hardware problems that might occur. This paper analyses existing solutions for accelerating high-performance computing algorithms along with problems that each architecture introduces, as well as potential solutions to the aforementioned drawbacks of utilizing the dataflow paradigm for accelerating algorithms. The analysis is performed on both hardware and software levels. Results indicate that dataflow hardware has the potential to be efficiently used along with control-flow hardware using AI. The best performance is achieved when combining control-flow and dataflow hardware on the same chip die.