Circuit Design in SOI

This chapter explains why high-voltage silicon-on-insulator technologies are well-suited for implementing high-voltage low-power converters. It further discusses the influence of technology-related aspects on the efficiency, size, and reliability of power converters and provides layout and design rules on how to improve these three parameters. The detailed analysis of the impact of parasitic capacitances on the converter performance in this chapter shows that capacitive losses and substrate coupling caused by parasitic capacitances are a challenge in fast-switching high-voltage converters for low-power applications. It further discusses loss-reduction mechanisms and approaches to efficiently reduce substrate coupling, increasing the converter’s efficiency and reliability. This chapter also compares different high-voltage-transistor implementations toward power converter-specific parameters. The detailed performance analysis of super-junction MOSFETs and super-junction IGBTs in this chapter can be used as a guideline for selecting the power-switch type that enables the highest efficiency in a given converter architecture.