Implementation of ECPM for High-Speed Area-Efficient Processor on FPGA

The Cryptography and network protocols call for the development of high-performance elliptic curve cryptographic (ECC) processors that are fast and low-powered, to address key challenges in Protecting data This study presents an ECC processor that is low-area, high-speed, and immune to side-channel attacks (SCAs) using field-programmable gate arrays (FP-GAs). Twisted wards curve for 256-bit Elliptic Curve Point Multiplication (ECPM) on the Edwards 25519 curve is supported by this processor as part of the high-security Edwards curve digital signature technique (EdDSA). This work presents a new hardware architecture or point-double operations on twisted Edwards curves, wherein point additions and point doublings are processed in a mere 257 and 512 clock cycles, respectively. Using only 14,245 slices on the Xilinx Virtex 7 FPGA platform, the proposed ECC processor performs single point multiplication for a 256-bit key in 1.21 ms, operating at a maximum clock frequency of 107.932 MHz in a cycle count of 130,815 with a throughput of 209.41 kbps, where the points are represented in projective coordinates. Due to the design’s fast multiplication rate and low hardware utilization, the implemented design can offer an extremely time- and space-efficient solution without compromising security levels.