Digital Controller Design

This chapter discusses the design of digital controllers for low-field MRI systems. It begins by describing the data transport architecture of the digital processor, which typically includes both a field-programmable gate array (FPGA) and a system-on-chip (SoC). Additionally, it describes the concept of bitstream programming for defining pulse sequences within the FPGA. Finally, it discusses the various programming domains used by the system, as well as their unique roles.