How to Garble Mixed Circuits that Combine Boolean and Arithmetic Computations
摘要
The study of garbling arithmetic circuits is initiated by Applebaum, Ishai, and Kushilevitz [FOCS’11], which can be naturally extended to mixed circuits. The basis of mixed circuits includes Boolean operations, arithmetic operations over a large ring and bit-decomposition that converts an arithmetic value to its bit representation. We construct efficient garbling schemes for mixed circuits. In the random oracle model, we construct two garbling schemes: Our schemes improve on the work of Ball, Malkin, and Rosulek [CCS’16] in the same model. Additionally relying on the DCR assumption, we construct in the programmable random oracle model a more efficient garbling scheme targeting mixed circuits over \(\mathbb Z_{2^b}\) , where addition gates are free, and each multiplication or bit-decomposition gate costs \(O(\lambda _{\text {DCR}} \cdot b)\) communication. We improve on the recent work of Ball, Li, Lin, and Liu [Eurocrypt’23] which also relies on the DCR assumption.