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Materials for Hardware Security

  • Mark Tehranipoor,
  • Kimia Zamiri Azar,
  • Navid Asadizanjani,
  • Fahim Rahman,
  • Hadi Mardani Kamali,
  • Farimah Farahmandi

摘要

Hardware security for integrated circuits (ICs) is becoming an increasingly relevant issue for semiconductor devices, and physical inspection methods are normally used as counter measurements. Current improvements in IC packaging, such as 2.5D and 3D packaging, as well as Heterogeneous Integration (HI), have increased the reliability requirements for package materials, such as extreme temperature reliability, low internal stress, high thermal transformation, and fewer flaws, among others. By altering material formulations and fabrication techniques, these critical properties might cause reliability issues and become hardware security concerns. It is necessary to adopt new physical inspection techniques for hardware assurances by using materials fingerprints for monitoring, verification, and assurance of semiconductor devices. This chapter will explore the growth and structure of advanced IC packaging, as well as the escalating security risks posed by HI hardware. The packaging material will be evaluated primarily using several threat models and a taxonomy of encapsulated security concerns is built, comprising six essential security-related attributes. This chapter will address the opportunities and challenges presented of using the material for hardware assurance due to the development of HI packaging. Several pre- and post-packaging hardware assurance solutions will be offered in response to these hardware assurance concerns. For post-packaging three non-destructive inspection techniques, Infrared (IR)-based material characterization, X-ray imaging, and Terahertz Time-Domain Spectrum (THz-TDS) will be used to compare the encapsulant material differences between authentic and counterfeit IC samples. This chapter will also investigate the incorporation of MEMS and NEMS into the packaging to provide pre-packaging hardware assurance.