ASIC Qualification
摘要
This chapter discusses an Application Specific Integrated design (ASIC) qualification test. This chapter also discusses an overview of Electro-Static Discharge (ESD) that includes several tests such Human Body Model (HBM), Charged Device Model (CMD), and Machine Model (MM). In addition, the sources of ESD failure and design techniques that prevent ESD damage for IO and standard cells are provided. In addition, the concept of Wafer Acceptance Test (WAT) as element evaluation of qualification is discussed. The role of ASIC manufacturers in the qualification process is also discussed.