An Approach to Mitigate CNN Complexity on Domain-Specific Architectures

Deep learning Convolutional Neural Network (CNN) is a powerful tool for feature extraction, edge detection and image classification. However, the training system of the networks has become increasingly complex due to the continuous growth in dataset which significantly impacts the computational time and energy consumption. In domain-specific platforms, this system is bounded by another level of limitation which is the hardware resources and the I/O resources. Using Gabor filter as a preprocessing layer can eliminate the redundant features and unnecessary information which results in much fewer memory used and less computation involved. In this paper, we propose a preprocessing layer which consists of Gabor kernel that serves as a weight kernel for CNNs and convolutional kernel that produces the features. We implemented the two kernels using the hardware description language Verilog that targets Xilinx FPGA devices. We designed a novel Gabor kernel based on the reconfigurability of FPGA by utilizing the BlockRAM (BRAMs) to store Gabor parameters, SRAM-based memory to store the input image and Digital Signal Processing (DSPs) for convolutional computation. We evaluated the design on Virtex 5 FPGA device using a 64 × 64 image, and we measured the performance of the Gabor kernel and convolutional kernel individually and found that Gabor kernel spend ~0.1 µs to produce the weight kernel and convolutional unit spends ~0.8 µs to find features.