Towards Fault Tolerance and Resilience in the Sequential Codelet Model
摘要
Failure or disruption in High-Performance Computer Systems can have a significant impact on human life, the environment, or the economy. Critical applications refer to software systems or functionalities that are essential for the safety, security, or continuity of critical infrastructure, services, or operations. Considering that semiconductor devices are susceptible to errors and failure, providing error detection and correction mechanisms in such systems is imperative. However, the main challenge for achieving fault tolerance and resiliency is compartmentalizing the causes and the consequences of error, in both hardware and software. Moreover, today’s extreme-scale parallel HPC systems necessitate fundamentally non-deterministic executions, making compartmentalization an even bigger challenge. To address these challenges, this paper proposes leveraging the Sequential Codelet Model (SCM), which facilitates parallel execution of programs expressed sequentially and hierarchically. We propose to exploit SCM’s encapsulation of semantics and data to compartmentalize faults transparently and efficiently. We present multiple techniques that can be implemented in the Sequential Codelet Model to include fault-tolerant and resiliency mechanisms. We implement already-known solutions by extending a functional emulator for the Sequential Codelet Model.