Signal Transmission Calibration Systems in Integrated Circuits

This chapter is devoted to developing and designing signals’ deviation compensation systems, which can significantly improve the transmitting and receiving data quality, increase the accuracy of I/O devices, and reduce the external and PVT variation effect on high-speed ICs. Principles of development of signals’ deviation compensation systems have been proposed which allow to significantly improve their technical characteristics and parameters such as data transfer speed, the accuracy of transmitting and receiving signals, power consumption, etc. A system of duty cycle variation detection and self-calibration has been proposed, which allows to significantly increase receiving signal’s quality and reduces duty cycle variations in ±0.5% range, due to implemented digital cells, resulting in receiver’s power consumption increase by 3.95 mW. A system of improving the accuracy of high-speed signals in transmitters is proposed, which compensates duty cycle variations by 39.5% and reduces signal’s jitter value up to twice, due to additional current distribution to level shifters, resulting in an increase of level shifter’s area by 12%. A system of high-speed signal’s edge boosting was developed, which significantly reduces PVT variation influence on high-speed ICs. This results in signal’s disproportion reduction to 1.2% as well as signal’s skew and jitter improvement, due to pre-driver’s power consumption increase by 2.26 mA. A system of transmission lines’ adverse influence compensation on high-speed data signals has been constructed, which signal’s disproportions caused by transmission lines increase signals’ slew rate by 50% and increase eye diagram horizontal and vertical openings by 13% and 10%, respectively. Also, the system reduces signal’s jitter by 20.7%, due to an increase of output buffer’s area by 13%.