Compact Multiplier-less CORDIC-Based FPGA Implementation of Sine and Modified Sine Chaotic Maps

This paper proposes a new modified sine chaotic map and implements both the conventional and proposed modified maps on hardware. The proposed modified sine map exhibits continuous chaotic behavior for all values of the main system parameter. This helps generate “pseudo-random” numbers and encrypt systems by making it easier to design system keys and ensuring chaos happens. The chaotic behavior of both maps is validated using time series and bifurcation diagrams. A reconfigurable CORDIC hardware block is used to compute the transcendental mathematical functions by employing shift-add and suboperations. While the sin function is computed in circular rotation mode, the multiplication operation is computed in linear vectoring mode. The proposed hardware architecture is multiplier-less, and hence, it does not consume any DSPs. The sine and modified sine maps are realized on Xilinx Artix-7 FFPGA board using Verilog HDL, in which the maximum frequencies are 5.276 and 5.043 MHz, respectively.