VLSI Floorplanning Algorithm Based on Reinforcement Learning with Obstacles

In typical Very Large Scale Integration Circuit (VLSI) designs, some modules have predetermined placements, while the placement of other modules cannot overlap with these pre-placed modules. The presence of fixed modules can complicate floorplanning and make it more challenging. To address this obstructed floorplanning problem, a Reinforcement Learning (RL)-based algorithm for obstructed VLSI floorplanning is proposed. This algorithm uses Sequence Pair (SP) encoding to represent the floorplan structure and leverages RL’s ability to learn autonomously and generalize to perform floorplanning. The proposed algorithm is tested on MCNC and GSRC benchmarks, and the experimental results demonstrate that it produces better floorplan solutions.