Floating Point Architectures

In the previous chapters, we have discussed the fixed point architectures. The majority of FPGA-based architectures are fixed point based. In the fixed point architectures, the number of bits reserved for integer and fractional part are fixed. Thus there is a limitation in representing a wide range of numbers. This limitation results in a truncation error in the output. Accuracy can be increased by increasing the word length but this in turn increases hardware complexity. At some point further increase in word length cannot be tolerable.