Fault-Tolerance- and Power-Aware Multi-core Mixed-Criticality System Design

In some MC! applications, an HC! task might overrun and overload the MC! system, or a fault can occur during the execution. However, these systems must be fault-tolerant and guarantee the correct execution of all HC! tasks by their deadlines to avoid catastrophic consequences, in any situation. Furthermore, in these MC! systems, the peak power consumption of the system may increase, especially in an overload situation, and exceed the processor TDP! constraint. This may generate heat beyond the cooling capacity, resulting the system to stop avoiding excessive heat and halting the processor. In this chapter, we propose a technique for dependent dual-criticality tasks in fault-tolerant multi-core MC! systems to manage peak power consumption and temperature. The technique develops a tree of possible task mapping and scheduling at design-time to cover all possible scenarios and reduce the LC! task drop rate in the HI mode!. At run-time, the system exploits the tree to select a proper schedule according to fault occurrences and criticality mode changes.