Basics of VLSI Testing and Debug

The increasing complexity and miniaturization of integrated circuits (ICs) have made VLSI testing a critical task in electronic device development. The purpose of VLSI testing is to verify functionality (could also include performance and reliability of ICs) and identify and correct any defects or faults. The trend of testing costs for ICs with shrinking technology sizes is on the rise. As technology nodes shrink, the reduction in transistor and interconnect size leads to increased susceptibility to various types of defects and faults. These include manufacturing defects, process variations, and electrostatic discharge (ESD) events. Numerous testing techniques and methodologies are constantly developed to improve IC testing effectiveness. For example, built-in-self-test (BIST) and design-for-testability (DFT) techniques can be integrated into IC design to reduce testing costs and time. The testing process plays a crucial role in ensuring the robustness and safety of electronic devices we use every day. Without proper testing, ICs could malfunction, leading to system failures, safety hazards, and economic losses. Additionally, considering the notion of security, testing plays a crucial role in the design, and with no exception, since we cover logic locking as a security countermeasure in this book, we will see how VLSI testing can affect this notion. The main aim of this chapter is to provide an overview of VLSI testing, including how it builds, what the goals of testing are, how faults could be detected, and how testing helps improve yield and reduce time-to-market. We will provide an overview of the different VLSI testing techniques, such as functional testing, structural testing, and fault simulation, and discuss their advantages and disadvantages.