Emergence of Cutting-Edge Technologies on Logic Locking

As the complexity and abundance of integrated circuits (ICs) continue to increase, failure analysis (FA) techniques are also evolving. The introduction of ICs that have more metal interconnect layers, silicon debugging, and diagnosis techniques have undergone a significant transformation. Considering the fact that defects in a chip’s base layer can no longer be easily accessed from the front side of the chip, a paradigm shift has been observed in which the usage of state-of-the-art FA tools has positively impacted the semiconductor industry, resulting in higher yields for ICs, improved probing testing, and shorter time-to-market. However, despite the successes in terms of productivity, emerging probing technologies and techniques have the potential to fail to deliver the appropriate level of security. Research efforts have demonstrated that microelectronic devices are vulnerable to security asset vulnerability due to the malicious use of FA tools, such as obtaining signal information (security asset) by electrical probing, noninvasive probing of registers that carry assets, PUFs, and cache memory. Given the importance of FA techniques continuing to evolve and the requirement of having security measures to protect against such potential threats, this chapter will provide a brief taxonomy of such technologies and demonstrate how they can result in the failure of logic locking techniques, regardless of their level of robustness.