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<p>Complementary logic and memory circuits based on n-type indium gallium zinc oxide (IGZO) and p-type tin monoxide (SnO) thin-film transistors (TFTs) were demonstrated with low-voltage, hysteresis-free operation. Optimization of IGZO channel thickness precisely tuned the inverter switching point to near V<sub>DD</sub>/2, achieving a high voltage gain of 146.6&#xa0;V/V at V<sub>DD</sub> = 3&#xa0;V and ultra-low static power consumption in the nanowatt range. SU-8 passivation effectively suppressed bias-stress-induced degradation in both IGZO and SnO TFTs, enhancing long-term stability and reducing device variation. Using these optimized devices, a 3-stage ring oscillator exhibited stable oscillations, and 6T-SRAM cells achieved tunable static noise margins by adjusting transistor strength ratios. This work represents one of the first implementations of IGZO/SnO-based &#xa0;6T-SRAM and demonstrates the potential of oxide semiconductor complementary circuits for low-power and reliable system integration, with promising future applicability to non-volatile memory and on-device artificial intelligence hardware.</p> Graphical abstract <p></p>

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First Demonstration of Hysteresis-Free IGZO/SnO-Based Complementary Circuits and SRAM with Long-Term Reliability Using SU-8 Passivation

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2025年10月31日

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  • Changwoo Han,
  • Hyeonjung Park,
  • Yejoo Choi,
  • Myeongjae Choi,
  • Jaehyuk Lim,
  • Huiseong Shin,
  • Seungjoon Moon,
  • Changhwan Shin

摘要

Complementary logic and memory circuits based on n-type indium gallium zinc oxide (IGZO) and p-type tin monoxide (SnO) thin-film transistors (TFTs) were demonstrated with low-voltage, hysteresis-free operation. Optimization of IGZO channel thickness precisely tuned the inverter switching point to near VDD/2, achieving a high voltage gain of 146.6 V/V at VDD = 3 V and ultra-low static power consumption in the nanowatt range. SU-8 passivation effectively suppressed bias-stress-induced degradation in both IGZO and SnO TFTs, enhancing long-term stability and reducing device variation. Using these optimized devices, a 3-stage ring oscillator exhibited stable oscillations, and 6T-SRAM cells achieved tunable static noise margins by adjusting transistor strength ratios. This work represents one of the first implementations of IGZO/SnO-based  6T-SRAM and demonstrates the potential of oxide semiconductor complementary circuits for low-power and reliable system integration, with promising future applicability to non-volatile memory and on-device artificial intelligence hardware.

Graphical abstract