Comparison of Synchronous and Self-Timed Circuit Soft Error Tolerances
摘要
The article compares the synchronous and self-timed (ST) circuit tolerance against a single short-term soft error. A nuclear particle running through the integrated circuit semiconductor body is considered the most probable soft error source. The article estimates a critical soft error probability in synchronous and ST circuits, implemented as pipelines, for a given nuclear particle flux density and proposes mathematical models describing the critical soft error probabilities depending on the circuit’s characteristics and the soft error parameters. Calculations show that the ST pipeline has, on average, 7.3 times better immunity to the single short-term soft errors compared to the synchronous counterpart. Taking into account the ST pipeline’s hardware redundancy and an associated larger die area of its implementation, the critical soft error intensity in the ST pipelines is about 4 times less than in the synchronous counterparts.