Abstract <p>Generally, logic locking technique is used to safeguard the intellectual property (IP) of integrated circuit (IC) designs across the world’s supply chain. To overcome security issues, the nano digital circuits exhibit greater strength than the traditional CMOS security methods. An advanced nano technology of Quantum dot Cellular Automata (QCA) based hardware security is domineering in this era that rising a greater cyber security from a threat and safeguarding sensitive data within ICs. In this work, the QCA based Enhanced Majority Voter (EMV) gate is presented in a logic locking technique to enhance its security by reducing complexity. In this proposed method, the EMV is performed and execute the correct key only when the exact key is given. This process can be highly safeguarded from thwarting tampering and reverse engineering attempts. The validation result of proposed EMV logic locking revealed as a marginal increase in complexity (measured by dots) that is compared to benchmarks while preserving identical execution times. Therefore, this proposed EMV locking strengthens hardware security without compromising circuit performance.</p>

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Advanced Logic Locking Hardware Security Using Quantum Dot Cellular Automata-Based Enhanced Majority Voter in Quantum Technology

  • V. Bhuvaneswari,
  • S. Yuvaraj

摘要

Abstract

Generally, logic locking technique is used to safeguard the intellectual property (IP) of integrated circuit (IC) designs across the world’s supply chain. To overcome security issues, the nano digital circuits exhibit greater strength than the traditional CMOS security methods. An advanced nano technology of Quantum dot Cellular Automata (QCA) based hardware security is domineering in this era that rising a greater cyber security from a threat and safeguarding sensitive data within ICs. In this work, the QCA based Enhanced Majority Voter (EMV) gate is presented in a logic locking technique to enhance its security by reducing complexity. In this proposed method, the EMV is performed and execute the correct key only when the exact key is given. This process can be highly safeguarded from thwarting tampering and reverse engineering attempts. The validation result of proposed EMV logic locking revealed as a marginal increase in complexity (measured by dots) that is compared to benchmarks while preserving identical execution times. Therefore, this proposed EMV locking strengthens hardware security without compromising circuit performance.