Abstract <p>A new thin-film transistor (TFT) structure based on hydrogenated amorphous silicon-germanium (a-SiGe:H) is proposed and analyzed, incorporating a double-layer gate dielectric. Silvaco TCAD simulations are employed to evaluate the electrical performance of a conventional single-layer silicon dioxide (SiO<sub>2</sub>) dielectric compared to a novel bi-layer configuration combining hafnium dioxide (HfO<sub>2</sub>) and SiO<sub>2</sub>. The bi-layer design leverages the high permittivity of HfO<sub>2</sub> to enhance gate control while maintaining excellent interface quality through the inclusion of a thin interfacial SiO<sub>2</sub> layer. This structure effectively addresses common limitations of high-κ dielectrics, such as interface traps and gate leakage. Simulation results demonstrate that the proposed bi-layer dielectric significantly improves device characteristics, reducing the threshold voltage from 0.458 to 0.130 V, increasing the ON-state current from 1.85 × 10<sup>−7</sup> to 3.24 × 10<sup>−5</sup> A, and enhancing the ON/OFF current ratio from 1.71 × 10<sup>5</sup> to 4.68 × 10<sup>6</sup>, with only a modest increase in subthreshold swing. Electric field and energy band analyses further confirm improved electrostatic control and reduced leakage current. These findings underscore the potential of the HfO<sub>2</sub>/SiO<sub>2</sub> bi-layer dielectric structure for advancing the performance and scalability of a-SiGe:H TFTs in future electronic applications.</p>

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Performance Enhancement of a-SiGe:H TFTs via SiO2/Al2O3 Bi-Layer Gate Dielectrics

  • Djemâa Ben Othmane

摘要

Abstract

A new thin-film transistor (TFT) structure based on hydrogenated amorphous silicon-germanium (a-SiGe:H) is proposed and analyzed, incorporating a double-layer gate dielectric. Silvaco TCAD simulations are employed to evaluate the electrical performance of a conventional single-layer silicon dioxide (SiO2) dielectric compared to a novel bi-layer configuration combining hafnium dioxide (HfO2) and SiO2. The bi-layer design leverages the high permittivity of HfO2 to enhance gate control while maintaining excellent interface quality through the inclusion of a thin interfacial SiO2 layer. This structure effectively addresses common limitations of high-κ dielectrics, such as interface traps and gate leakage. Simulation results demonstrate that the proposed bi-layer dielectric significantly improves device characteristics, reducing the threshold voltage from 0.458 to 0.130 V, increasing the ON-state current from 1.85 × 10−7 to 3.24 × 10−5 A, and enhancing the ON/OFF current ratio from 1.71 × 105 to 4.68 × 106, with only a modest increase in subthreshold swing. Electric field and energy band analyses further confirm improved electrostatic control and reduced leakage current. These findings underscore the potential of the HfO2/SiO2 bi-layer dielectric structure for advancing the performance and scalability of a-SiGe:H TFTs in future electronic applications.