Sequential Gate and Field Plate Optimization in N-Polar GaN HEMTs for High Breakdown Voltage and RF Efficiency
摘要
This work presents a stepwise structural optimization of N-polar GaN HEMTs on SiC, in which each design iteration addresses the limitations of the previous structure and moves toward a higher-performance device. Starting from an experimental baseline (gm = 270 mS/mm, fT = 18 GHz, fmax = 44 GHz, IDmax = 0.812 A/mm), Device A (Arcuate-Ended Field Plate) mitigates peak edge fields and increases gm to 316.44 mS/mm, fT to 95.68 GHz, and fmax to 170.01 GHz while raising IDmax to 1.05 A/mm and yielding BV = 240 V. However, Device A still suffers from substantial gate leakage and residual dynamic collapse. Device B (HfO2 MIS gate with partial HfO2 passivation) directly resolves Device A’s leakage and interface issues: Cgs/Cgd reduce to 0.36/0.08 pF/mm, gm rises to 380.32 mS/mm, fT/fmax improve to 135.19/251.07 GHz, IDmax increases to 1.28 A/mm, BV = 300 V, and gate leakage at VGS = 2 V falls to = 5 × 10–8 A/mm. Finally, Device C (recessed corrugated channel with a dual-dielectric HfO2/HfZrOx (HZO) gate stack) overcomes Device B’s remaining trade-offs, further lowering Cgs/Cgd to 0.30/0.06 pF/mm, boosting gm to 460.91 mS/mm and fT/fmax to 183.14/360.03 GHz, achieving IDmax= 1.50 A/mm, BV = 380 V, and ultra-low gate leakage (4.4 × 10–9 A/mm). The results demonstrate that progressive field–gate co-engineering, field-plate shaping, high-k MIS integration, and ferroelectric gating provide a practical pathway to suppress leakage and trapping while significantly improving DC and RF performance for N-polar GaN HEMTs.