Abstract <p>This work explores the effect of Si doped HfO<sub>2</sub> (Si : HfO<sub>2</sub>) ferroelectric layer (FEL) under the gate electrode on the characteristics of the Negative Capacitance Field Effect Transistor (NCFET). Due to the ferroelectric polarization of Si doped HfO<sub>2</sub> a negative capacitance is produced in the ferroelectric region, which essentially reduces the total gate capacitance. Here we showed that the inclusion of 5 nm ferroelectric layer decreases the subthreshold swing (SS) to around 52 mV/decade, which is almost 30% lower, and decreases the threshold voltage to 0.71 V which is more than 40% lower compared to the conventional FET. Also, the On-Off current ratio increase to around <InlineEquation ID="IEq2"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="11453_2025_3567_Article_IEq2.gif" Format="GIF" Height="18" Rendition="HTML" Resolution="72" Type="Linedraw" Width="71" /> </InlineMediaObject> <EquationSource Format="TEX">\(1.4 \times {{10}^{{10}}}\)</EquationSource> <!--Semicnd2460269Ahmed-m2--> </InlineEquation> with 5 nm ferroelectric layer. Moreover, the increase in transconductance, output characteristics, and the effect of ferroelectric layer on saturation currents as well as off-state currents are explained in detail.</p>

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Electrostatic Analysis and Performance Optimization of Si Doped HfO2 Ferroelectric Material Based Negative Capacitance Field Effect Transistor (NCFET)

  • Md. Ibrahim Ahmed,
  • Kamrul Hasan,
  • Mohammad Junaebur Rashid,
  • Mohammed Shahriar Sabuktagin

摘要

Abstract

This work explores the effect of Si doped HfO2 (Si : HfO2) ferroelectric layer (FEL) under the gate electrode on the characteristics of the Negative Capacitance Field Effect Transistor (NCFET). Due to the ferroelectric polarization of Si doped HfO2 a negative capacitance is produced in the ferroelectric region, which essentially reduces the total gate capacitance. Here we showed that the inclusion of 5 nm ferroelectric layer decreases the subthreshold swing (SS) to around 52 mV/decade, which is almost 30% lower, and decreases the threshold voltage to 0.71 V which is more than 40% lower compared to the conventional FET. Also, the On-Off current ratio increase to around \(1.4 \times {{10}^{{10}}}\) with 5 nm ferroelectric layer. Moreover, the increase in transconductance, output characteristics, and the effect of ferroelectric layer on saturation currents as well as off-state currents are explained in detail.