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Abstract <p>An approach to designing neuromorphic electronic devices based on convolutional neural networks with backpropagation training is presented, aimed at increasing the energy efficiency and performance of autonomous systems. The developed approach is based on the use of a neural network topology compiler based on five basic CMOS blocks designed for the analog implementation of all computing operations in the training and inference modes. The developed crossbar arrays of functional analog CMOS blocks with digital control of the conductivity level ensure the implementation of the matrix-vector multiplication operation in the convolutional and fully connected layers without using a DAC and using ADC in the chains of the control of synaptic connection weights only in the training mode. The effectiveness of the approach is demonstrated using the example of the digit classification problem, solved with 97.87% accuracy on test data using the developed model of hardware implementation of an asynchronous analog neural network with built-in learning.</p>

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Hardware Implementation of an Asynchronous Analog Neural Network with Learning Based on Unified CMOS IP Blocks

  • 期刊论文

  • 发表日期：

    2025年8月1日

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  • M. O. Petrov,
  • E. A. Ryndin,
  • N. V. Andreeva

摘要

Abstract

An approach to designing neuromorphic electronic devices based on convolutional neural networks with backpropagation training is presented, aimed at increasing the energy efficiency and performance of autonomous systems. The developed approach is based on the use of a neural network topology compiler based on five basic CMOS blocks designed for the analog implementation of all computing operations in the training and inference modes. The developed crossbar arrays of functional analog CMOS blocks with digital control of the conductivity level ensure the implementation of the matrix-vector multiplication operation in the convolutional and fully connected layers without using a DAC and using ADC in the chains of the control of synaptic connection weights only in the training mode. The effectiveness of the approach is demonstrated using the example of the digit classification problem, solved with 97.87% accuracy on test data using the developed model of hardware implementation of an asynchronous analog neural network with built-in learning.