Fast-Response and Low-Power Low-Dropout Regulator for In-Memory Computing

A low dropout (LDO) linear regulator with fast transient response and small overshoot voltage is proposed to address the problem of large and frequent quantization in existing large-scale in-memory computing (IMC) that seriously affects the stability of the reference voltage and the accuracy of the calculation. The regulator uses an enable circuit to save power in noncomputing states, a very low-voltage folding op-amp to achieve high gain, an overshoot voltage detection circuit to increase the swing rate current and thus improve the response speed, an adaptive bias circuit to provide bandwidth under heavy load and reduce power consumption under light load, and a PMOS power tube to achieve high drive current under low dropout voltage. The regulator is designed in a 65 nm standard CMOS process with a dropout voltage of 0.1 V and can provide a stable reference voltage with a maximum overshoot voltage of 30 mV and a maximum response time of 0.45 μs at 30 mA output current. The regulator is applied to a bit-serial large-scale IMC, and the results show that the IMC can read, write, and compute 256 bits of data quickly and stably, supporting 64 times more computing bits and 5.89 times faster recovery than existing buffer regulators. Compared with similar regulators, the drive capability is reduced, but the stable voltage can be provided at very low dropout voltage, which requires lower reference value and matches a wider range of IMC.