Reduced Crosstalk Effects in Integrated Circuits Based on Through Silicon Vias

In present days, through silicon via (TSV) become a promising technology for integrated circuit packaging. The structure of the TSV composed of copper, insulating liner, and silicon substrate. The TSV is enclosed using insulating liner to troubleshoot the leakage in signal from copper (Cu) to silicon (Si) substrate. In the existing TSV structures, silicon dioxide (SiO₂) dielectric is used as insulation liner because of its material compatibility with the silicon substrate. On the other hand, several researchers were reported the problems of SiO₂. Due to the high dielectric constant of SiO₂, the insulating capacitance increases that result in increasing of delay. Therefore, SiO₂ is not suitable for high-performance applications. To alleviate the insulating capacitance, polymer liner is used rather than SiO₂. A proposed novel TSV structure consists of the signal TSV is encompassed by utilizing the polypropylene liner. For comparison purpose, we perform the simulations for both conventional and proposed TSV structures by varying different design parameters of TSV. It has been observed that the proposed TSV structure shows 26% decrease in crosstalk compared to conventional TSV structures.