Thermal management materials for 3D-stacked integrated circuits
摘要
As transistor scaling approaches nanometre and even atomic scales, 3D stacking has become a critical enabler for advancement in the semiconductor industry, especially in high-performance computing and artificial intelligence (AI) applications. However, 3D integration introduces substantial thermal management challenges related to the increased power density and constrained heat dissipation pathways, particularly through low thermal conductivity interlayer dielectrics and complex interfaces. In this Review, we discuss state-of-the-art thermal management materials, covering their process compatibility, the critical integration challenges and the need for improved methods to enhance heat transport across interfaces. Advanced thermal characterization metrologies are introduced to highlight the need for non-destructive in-line metrologies. Finally, we provide a road map that outlines future research directions for material growth, integration and characterization methodologies to enable viable thermal solutions for 3D integration and beyond.