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<p>Energy-efficient neuromorphic hardware requires precise and reliable control of synaptic weight updates. However, in most charge-trap-based artificial synapses, weight modulation is directly coupled to programming pulse parameters, limiting independent control of plasticity gain and retention. Here, we introduce a drain–gate programming scheme in a MoS<sub>2</sub>/hBN/Fe<sub>2</sub>O<sub>3</sub> flash memory that enables decoupled control of carrier injection and synaptic weight updates. The device exhibits an on/off ratio of ~10<sup>7</sup> and maintains clearly distinguishable on and off states over &gt;10 years of extrapolated retention. Beyond conventional gate-driven programming, the proposed drain-gate pulse scheme independently controls the direction and magnitude of conductance updates. As a result, the device exhibits highly linear conductance modulation and achieves 1024 distinguishable conductance states, representing the highest multistate capability reported for flash-memory devices to date. This high analog-state density highlights the potential of the device for high-accuracy in-memory computing and neuromorphic applications.</p>

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Decoupled drain-gate control of synaptic plasticity in a MoS2 flash memory

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2026年7月21日

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  • Kyunghwan Sung,
  • Taehun Lee,
  • Qi Zhang,
  • Yong-Jun Kwon,
  • Hyobin Nam,
  • Kenji Watanabe,
  • Takashi Taniguchi,
  • Sung-Jin Chang,
  • Chan-Ho Yang,
  • Seungyong Lee,
  • Euyheon Hwang,
  • Sungjae Cho

摘要

Energy-efficient neuromorphic hardware requires precise and reliable control of synaptic weight updates. However, in most charge-trap-based artificial synapses, weight modulation is directly coupled to programming pulse parameters, limiting independent control of plasticity gain and retention. Here, we introduce a drain–gate programming scheme in a MoS2/hBN/Fe2O3 flash memory that enables decoupled control of carrier injection and synaptic weight updates. The device exhibits an on/off ratio of ~107 and maintains clearly distinguishable on and off states over >10 years of extrapolated retention. Beyond conventional gate-driven programming, the proposed drain-gate pulse scheme independently controls the direction and magnitude of conductance updates. As a result, the device exhibits highly linear conductance modulation and achieves 1024 distinguishable conductance states, representing the highest multistate capability reported for flash-memory devices to date. This high analog-state density highlights the potential of the device for high-accuracy in-memory computing and neuromorphic applications.