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<p>The integration of high-quality, ultrathin van der Waals (vdW) dielectrics with 2D semiconductors remains a critical bottleneck in the development of reliable, ultra-scaled field-effect transistors (FETs). Here, we report a comprehensive study of MoS<sub>2</sub>-based FETs employing layered rhombohedral MnAl<sub>2</sub>S<sub>4</sub> as the gate insulator, a previously unexplored vdW dielectric that can be isolated down to the monolayer limit. Devices fabricated in both top-gated (TG) and bottom-gated (BT) configurations exhibit excellent electrical performance, featuring low gate leakage, minimal hysteresis ( &lt; 2 mV) under high electric fields up to 11 MV cm<sup>-1</sup> across a wide range of gate voltage sweep rates (0.001–10 Vs<sup>-1</sup>). We observed a consistent counterclockwise hysteresis and an anomalous bias temperature instability (BTI), possibly caused by the diffusion of Mn interstitials and S vacancies formed inside the MnAl<sub>2</sub>S<sub>4</sub> film during growth. Notably, we show that threshold voltage degradation at high temperatures was observed to be negligible, and hysteresis dynamics and very small BTI are reproducible over a long time, demonstrating the high reliability of our devices. In addition, the vdW interface between MnAl<sub>2</sub>S<sub>4</sub> and MoS<sub>2</sub> in our device is of good quality and is expected to provide a small density of insulator defects, a promising gate dielectric for reliable 2D devices.</p>

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Near-zero hysteresis van der Waals MnAl2S4 field-effect transistors with low minimal threshold voltage degradation and high thermal stability

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2026年1月9日

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  • Seyed Mehdi Sattari-Esfahlan,
  • Yury Illarionov,
  • Fang Xu,
  • Alexandros Provias,
  • Saeed Mirzaei,
  • Jan Michalička,
  • Theresia Knobloch,
  • Ondřej Man,
  • Yangbo Zhou,
  • Tibor Grasser

摘要

The integration of high-quality, ultrathin van der Waals (vdW) dielectrics with 2D semiconductors remains a critical bottleneck in the development of reliable, ultra-scaled field-effect transistors (FETs). Here, we report a comprehensive study of MoS2-based FETs employing layered rhombohedral MnAl2S4 as the gate insulator, a previously unexplored vdW dielectric that can be isolated down to the monolayer limit. Devices fabricated in both top-gated (TG) and bottom-gated (BT) configurations exhibit excellent electrical performance, featuring low gate leakage, minimal hysteresis ( < 2 mV) under high electric fields up to 11 MV cm-1 across a wide range of gate voltage sweep rates (0.001–10 Vs-1). We observed a consistent counterclockwise hysteresis and an anomalous bias temperature instability (BTI), possibly caused by the diffusion of Mn interstitials and S vacancies formed inside the MnAl2S4 film during growth. Notably, we show that threshold voltage degradation at high temperatures was observed to be negligible, and hysteresis dynamics and very small BTI are reproducible over a long time, demonstrating the high reliability of our devices. In addition, the vdW interface between MnAl2S4 and MoS2 in our device is of good quality and is expected to provide a small density of insulator defects, a promising gate dielectric for reliable 2D devices.