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<p>Improving many-body computational efficiency is crucial for exploring condensed matter systems. However, existing acceleration methods are limited and mostly based on von Neumann-like architectures. Here we leverage the capabilities of Field Programmable Gate Arrays for conducting quantum many-body calculations and realize a tenfold speedup over Central Processing Unit-based computation for a Monte Carlo algorithm. By using a supercell structure and simulating the hardware architecture with High-Level Synthesis, we achieve <InlineEquation ID="IEq1"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="42005_2025_2050_Article_IEq1.gif" Format="GIF" Height="19" Rendition="HTML" Resolution="72" Type="Linedraw" Width="35" /> </InlineMediaObject> <EquationSource Format="TEX">\(O(1)\)</EquationSource> <EquationSource Format="MATHML"><math> <mi>O</mi> <mrow> <mo>(</mo> <mrow> <mn>1</mn> </mrow> <mo>)</mo> </mrow> </math></EquationSource> </InlineEquation> scaling for the time of one sweep, regardless of the overall system size. We also demonstrate the utilization of programmable hardware to accelerate a typical tensor network algorithm for ground-state calculations. Additionally, we show that the current hardware computing acceleration is on par with that of multi-threaded Graphics Processing Unit parallel processing. Our findings highlight the advantages of hardware implementation and pave the way for efficient many-body computations.</p>

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Many-body computing on Field Programmable Gate Arrays

  • 期刊论文

  • 出版模式：

    开放获取

  • 发表日期：

    2025年3月25日

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  • Songtai Lv,
  • Yang Liang,
  • Yuchen Meng,
  • Xiaochen Yao,
  • Jincheng Xu,
  • Yang Liu,
  • Qibin Zheng,
  • Haiyuan Zou

摘要

Improving many-body computational efficiency is crucial for exploring condensed matter systems. However, existing acceleration methods are limited and mostly based on von Neumann-like architectures. Here we leverage the capabilities of Field Programmable Gate Arrays for conducting quantum many-body calculations and realize a tenfold speedup over Central Processing Unit-based computation for a Monte Carlo algorithm. By using a supercell structure and simulating the hardware architecture with High-Level Synthesis, we achieve \(O(1)\) O ( 1 ) scaling for the time of one sweep, regardless of the overall system size. We also demonstrate the utilization of programmable hardware to accelerate a typical tensor network algorithm for ground-state calculations. Additionally, we show that the current hardware computing acceleration is on par with that of multi-threaded Graphics Processing Unit parallel processing. Our findings highlight the advantages of hardware implementation and pave the way for efficient many-body computations.