<p>In-memory computing combines memory and computing together in a single processing unit, eliminating the energy and latency overheads associated with data transfer between memory and computing units, which occurs in conventional systems. When implemented with crossbar arrays of memory devices, the approach can be used to accelerate low-level, data-intensive algebraic operations such as matrix–vector and inverse matrix–vector multiplication. However, although matrix–vector multiplication has recently been demonstrated, inverse matrix–vector multiplication faces additional challenges because of increased circuit implementation complexity. Here we report a fully integrated analogue closed-loop in-memory computing accelerator for inverse matrix–vector multiplication. The chip is based on static random-access memory and is fabricated in 90-nm complementary metal–oxide–semiconductor technology. It features two 64 × 64 memory arrays, enclosed in an analogue feedback loop by on-chip operational amplifiers, digital-to-analogue and analogue-to-digital converters. We experimentally show that the chip can be used to find solutions to systems of differential equations by recursive block inversion. It can also be used for sounding rocket trajectory tracking by Kalman filter and acceleration of inverse kinematics in robotic arms. The accuracy of the results closely matches fully digital systems working at the equivalent integrated circuit precision, providing advantages in terms of latency, energy and area consumption.</p>