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<p>Two-dimensional semiconductors could be used as a channel material in miniaturized transistors with high gate control. However, the lack of insulators that are both compatible with two-dimensional materials and suitable for integration into a fully scalable process flow limits development. Here we show that freestanding hafnium zirconium oxide (Hf<sub>0.5</sub>Zr<sub>0.5</sub>O<sub>2</sub>; HZO) membranes can be integrated with two-dimensional semiconductors as a high-<i>κ</i> dielectric. The HZO membranes can be varied in thickness from 5 to 40 nm, and be transferred onto molybdenum disulfide (MoS<sub>2</sub>) to create the top-gate dielectric in field-effect transistors. A 20-nm-thick HZO membrane exhibits a dielectric constant of 20.6 ± 0.5 and a leakage current (at 1 MV cm<sup>−1</sup>) of under 2.6 × 10<sup>−6</sup> A cm<sup>−2</sup>, below the requirements of the International Technology Roadmap for Semiconductors, as well as typical ferroelectric behaviour. The MoS<sub>2</sub> transistors with HZO dielectric exhibit an on/off ratio of 10<sup>9</sup> and a subthreshold swing below 60 mV dec<sup>−1</sup> across four orders of current. We use the transistors to create an inverter, logic gates and a 1-bit full adder circuit. We also create a MoS<sub>2</sub> transistor with a channel length of 13 nm, which exhibits an on/off ratio of over 10<sup>8</sup> and a subthreshold swing of 70 mV dec<sup>−1</sup>.</p>

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Integration of freestanding hafnium zirconium oxide membranes into two-dimensional transistors as a high-κ ferroelectric dielectric

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2025年6月26日

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  • Che-Yi Lin,
  • Bo-Cia Chen,
  • Yu-Chen Liu,
  • Shang-Fu Kuo,
  • Hsien-Chi Tsai,
  • Yuan-Ming Chang,
  • Chang-Yang Kuo,
  • Chun-Fu Chang,
  • Jyun-Hong Chen,
  • Ying-Hao Chu,
  • Mahito Yamamoto,
  • Chang-Hong Shen,
  • Yu-Lun Chueh,
  • Po-Wen Chiu,
  • Yi-Chun Chen,
  • Jan-Chi Yang,
  • Yen-Fu Lin

摘要

Two-dimensional semiconductors could be used as a channel material in miniaturized transistors with high gate control. However, the lack of insulators that are both compatible with two-dimensional materials and suitable for integration into a fully scalable process flow limits development. Here we show that freestanding hafnium zirconium oxide (Hf0.5Zr0.5O2; HZO) membranes can be integrated with two-dimensional semiconductors as a high-κ dielectric. The HZO membranes can be varied in thickness from 5 to 40 nm, and be transferred onto molybdenum disulfide (MoS2) to create the top-gate dielectric in field-effect transistors. A 20-nm-thick HZO membrane exhibits a dielectric constant of 20.6 ± 0.5 and a leakage current (at 1 MV cm−1) of under 2.6 × 10−6 A cm−2, below the requirements of the International Technology Roadmap for Semiconductors, as well as typical ferroelectric behaviour. The MoS2 transistors with HZO dielectric exhibit an on/off ratio of 109 and a subthreshold swing below 60 mV dec−1 across four orders of current. We use the transistors to create an inverter, logic gates and a 1-bit full adder circuit. We also create a MoS2 transistor with a channel length of 13 nm, which exhibits an on/off ratio of over 108 and a subthreshold swing of 70 mV dec−1.