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<p>The basic structure of resistive random access memory (RRAM), with an insulator between two metal electrodes, closely resembles that of a capacitor. However, most studies have focused on resistive switching characteristics, with little attention to the coexistence with capacitive switching. In this study, we analyzed the coexistence of resistance and capacitance memory effects in RRAM devices through measurements and simulations. Using an Al/Al<sub>2</sub>O<sub>3</sub>/HfO<sub>2</sub>/SiO<sub>x</sub>/p<sup>+</sup>-Si stack, we confirmed this coexistence experimentally. DC measurements showed bipolar switching characteristics with set operations at positive voltages. Continuous set and reset pulse measurements revealed that the low resistance state (LRS) coincides with a high capacitance state (HCS), while the high resistance state (HRS) aligns with a low capacitance state (LCS). To investigate the underlying mechanisms, we conducted two simulations using COMSOL Multiphysics to confirm the overall trend of device memory effects: One simulation focused on oxide-silicon interface trap charge variations that induce capacitance changes due to Joule heating and heat transfer, while another simulation focused on the capacitance variations induced by changes in the oxygen ion concentration within the oxygen reservoir layer according to the device’s resistance state.</p>

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Investigation of dual memory behavior in RRAM: coexistence of resistive and capacitive switching phenomena

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2025年4月15日

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  • Hyoseob Kim,
  • Suhan Kim,
  • Jae-Yeong Cho,
  • Sin-Hyung Lee,
  • Min-Hwi Kim

摘要

The basic structure of resistive random access memory (RRAM), with an insulator between two metal electrodes, closely resembles that of a capacitor. However, most studies have focused on resistive switching characteristics, with little attention to the coexistence with capacitive switching. In this study, we analyzed the coexistence of resistance and capacitance memory effects in RRAM devices through measurements and simulations. Using an Al/Al2O3/HfO2/SiOx/p+-Si stack, we confirmed this coexistence experimentally. DC measurements showed bipolar switching characteristics with set operations at positive voltages. Continuous set and reset pulse measurements revealed that the low resistance state (LRS) coincides with a high capacitance state (HCS), while the high resistance state (HRS) aligns with a low capacitance state (LCS). To investigate the underlying mechanisms, we conducted two simulations using COMSOL Multiphysics to confirm the overall trend of device memory effects: One simulation focused on oxide-silicon interface trap charge variations that induce capacitance changes due to Joule heating and heat transfer, while another simulation focused on the capacitance variations induced by changes in the oxygen ion concentration within the oxygen reservoir layer according to the device’s resistance state.