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<p>NiO nanoparticles (NPs) synthesized using glancing angle deposition (GLAD) technique over MgZnO thin film was used to design a novel memory device. The NiO NPs with average diameter ~ 9.5&#xa0;nm was uniformly distributed over the MgZnO thin film surface. The MgZnO thin film/NiO NPs memory device when measured for the C-V hysteresis characteristics at varying sweep voltage demonstrated a charge trapping and de-trapping mechanism. Moreover, the device exhibited low interface states density (D<sub>it</sub>) (1.45 × 10<sup>10</sup> eV<sup>− 1</sup> cm<sup>− 2</sup>) at 1&#xa0;MHz and large capacitive memory of  ~ 6&#xa0;V at ± 7&#xa0;V. The large memory window was attributed to the better interface quality between MgZnO thin film and NiO NPs. Additionally, the device also exhibited good endurance over 1000 programme/erase cycles and longer time charge retention up to 2 × 10<sup>4</sup> s. The improved performance of device and more charge accumulation capacity was primarily due to the large effective area and quantum confinement effect owing to NiO NPs. Further, on performing a resistive switching analysis, the device could show a good on-off ratio (R<sub>HRS</sub>/R<sub>LRS</sub>) of 1.24 × 10<sup>2</sup>. Therefore, the proposed device structure can be a good option for future memory applications.</p>

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Low interface state density and large capacitive memory window using RF sputtered NiO nanoparticles decorated MgZnO thin film

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2025年1月17日

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  • Mritunjay Kumar,
  • Jay Chandra Dhar

摘要

NiO nanoparticles (NPs) synthesized using glancing angle deposition (GLAD) technique over MgZnO thin film was used to design a novel memory device. The NiO NPs with average diameter ~ 9.5 nm was uniformly distributed over the MgZnO thin film surface. The MgZnO thin film/NiO NPs memory device when measured for the C-V hysteresis characteristics at varying sweep voltage demonstrated a charge trapping and de-trapping mechanism. Moreover, the device exhibited low interface states density (Dit) (1.45 × 1010 eV− 1 cm− 2) at 1 MHz and large capacitive memory of  ~ 6 V at ± 7 V. The large memory window was attributed to the better interface quality between MgZnO thin film and NiO NPs. Additionally, the device also exhibited good endurance over 1000 programme/erase cycles and longer time charge retention up to 2 × 104 s. The improved performance of device and more charge accumulation capacity was primarily due to the large effective area and quantum confinement effect owing to NiO NPs. Further, on performing a resistive switching analysis, the device could show a good on-off ratio (RHRS/RLRS) of 1.24 × 102. Therefore, the proposed device structure can be a good option for future memory applications.