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<p>Inverse design via topology optimization has led to innovations in integrated photonics and offers a promising way for designing high-efficiency on-chip couplers with a minimal footprint. In this work, we exploit topology optimization to design a compact vertical coupler incorporating a bottom reflector, which achieves sub-decibel coupling efficiency on the 220-nm silicon-on-insulator platform. The final design of the vertical coupler yields a predicted coupling efficiency of −0.35 dB at the wavelength of 1550&#xa0;nm with a footprint of 14&#xa0;µm <InlineEquation ID="IEq1"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="41598_2025_86161_Article_IEq1.gif" Format="GIF" Height="13" Rendition="HTML" Resolution="72" Type="Linedraw" Width="19" /> </InlineMediaObject> <EquationSource Format="TEX">\(\times\)</EquationSource> <EquationSource Format="MATHML"><math> <mo>×</mo> </math></EquationSource> </InlineEquation> 14&#xa0;µm, which is considerably smaller than conventional grating couplers. Its topology-optimized geometry can be realized by applying one full-etch and one 70-nm shallow-etch process and the fabricability is also guaranteed by a minimum feature size around 150&#xa0;nm. Analysis of the potential fabrication imperfections indicates that the topology-optimized coupler is more resilient to in-plane variations, as the deviation of approximately ±100 nm in the misalignment of the topology-optimized features, ±20 nm in the size of the topology-optimized features, and ±10 nm in shallow etch depth yields an additional 1-dB loss as a penalty at the wavelength of 1550 nm. The proposed vertical coupler can further miniaturize photonic integrated circuits and enable highly-efficient networks between optical fibers and other photonic devices.</p>

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Compact inverse designed vertical coupler with bottom reflector for sub-decibel fiber-to-chip coupling on silicon on insulator platform

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  • 发表日期：

    2025年1月23日

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  • Shiang-Yu Huang,
  • Stefanie Barz

摘要

Inverse design via topology optimization has led to innovations in integrated photonics and offers a promising way for designing high-efficiency on-chip couplers with a minimal footprint. In this work, we exploit topology optimization to design a compact vertical coupler incorporating a bottom reflector, which achieves sub-decibel coupling efficiency on the 220-nm silicon-on-insulator platform. The final design of the vertical coupler yields a predicted coupling efficiency of −0.35 dB at the wavelength of 1550 nm with a footprint of 14 µm \(\times\) × 14 µm, which is considerably smaller than conventional grating couplers. Its topology-optimized geometry can be realized by applying one full-etch and one 70-nm shallow-etch process and the fabricability is also guaranteed by a minimum feature size around 150 nm. Analysis of the potential fabrication imperfections indicates that the topology-optimized coupler is more resilient to in-plane variations, as the deviation of approximately ±100 nm in the misalignment of the topology-optimized features, ±20 nm in the size of the topology-optimized features, and ±10 nm in shallow etch depth yields an additional 1-dB loss as a penalty at the wavelength of 1550 nm. The proposed vertical coupler can further miniaturize photonic integrated circuits and enable highly-efficient networks between optical fibers and other photonic devices.