<p>Efficiency is essential in lightweight cryptography to ensure robust protection within constrained environments. This paper introduces a lightweight block cipher built on a Non-Linear Feedback Shift Register (NFSR), referred to as the NFSR-Based Block Cipher (NFBC). The cipher is designed for constrained environments where both efficiency and strong security are critical. NFBC operates as a Nonce-based Authenticated Encryption with Associated Data (NAEAD) scheme, providing confidentiality and authenticity within a single framework. The design achieves robust protection while maintaining minimal hardware overhead. NFBC operates on 128-bit data, key, and nonce sizes, fully aligning with National Institute of Standards and Technology (NIST) lightweight cryptography requirements. The design integrates a Non-Linear Feedback Shift Register (NFSR) for generating high-entropy round subkeys, dynamic chaotic substitution box (S-boxes) for strong confusion, and a Group Permutation (GRP) mechanism that ensures rapid diffusion with hardware-friendly efficiency. Security is rigorously evaluated across multiple dimensions. NFBC passes all 15 NIST Statistical Test Suite (STS) tests, achieves near-ideal avalanche and Bit Independence Criterion (BIC), and demonstrates consistently high nonlinearity across 200 independent chaotic S-box instances. The S-box achieves a maximum differential probability of 10/256 and maximum linear probability of <InlineEquation ID="IEq1"> <EquationSource Format="TEX">\((72/256)^{2}\)</EquationSource> </InlineEquation>, confirming strong resistance to classical attacks. To strengthen theoretical guarantees, a provable branch-number analysis is introduced, establishing conservative lower bounds on active S-boxes (<InlineEquation ID="IEq2"> <EquationSource Format="TEX">\(\ge 45\)</EquationSource> </InlineEquation> across 20 rounds), with corresponding differential and linear probabilities that are vanishingly small. Formal AEAD security is ensured through an Encrypt-then-MAC (EtM) construction. Implementation on a Xilinx Artix-7 FPGA confirms practicality: NFBC achieves superior throughput-per-area compared to several NIST Round-2 lightweight candidates (SPOC, SPOOK, GIFT-COFB, ESTATE, SAEAES, Oribatida) and CAESAR finalists (Ascon-128, Ascon-small, CLOC-AES, SILC-AES). Estimated countermeasure overheads for masking and fault detection demonstrate feasibility against side-channel and fault attacks. These results confirm NFBC as a secure, efficient, and practically deployable lightweight cryptographic solution.</p>

NFBC: an efficient FPGA based NFSR-oriented lightweight block cipher suitable for embedded system

期刊论文
出版模式：

开放获取
发表日期：

2026年1月6日

查看全文

Runa Chatterjee,
Rajdeep Chakraborty

摘要

Efficiency is essential in lightweight cryptography to ensure robust protection within constrained environments. This paper introduces a lightweight block cipher built on a Non-Linear Feedback Shift Register (NFSR), referred to as the NFSR-Based Block Cipher (NFBC). The cipher is designed for constrained environments where both efficiency and strong security are critical. NFBC operates as a Nonce-based Authenticated Encryption with Associated Data (NAEAD) scheme, providing confidentiality and authenticity within a single framework. The design achieves robust protection while maintaining minimal hardware overhead. NFBC operates on 128-bit data, key, and nonce sizes, fully aligning with National Institute of Standards and Technology (NIST) lightweight cryptography requirements. The design integrates a Non-Linear Feedback Shift Register (NFSR) for generating high-entropy round subkeys, dynamic chaotic substitution box (S-boxes) for strong confusion, and a Group Permutation (GRP) mechanism that ensures rapid diffusion with hardware-friendly efficiency. Security is rigorously evaluated across multiple dimensions. NFBC passes all 15 NIST Statistical Test Suite (STS) tests, achieves near-ideal avalanche and Bit Independence Criterion (BIC), and demonstrates consistently high nonlinearity across 200 independent chaotic S-box instances. The S-box achieves a maximum differential probability of 10/256 and maximum linear probability of \((72/256)^{2}\) , confirming strong resistance to classical attacks. To strengthen theoretical guarantees, a provable branch-number analysis is introduced, establishing conservative lower bounds on active S-boxes ( \(\ge 45\) across 20 rounds), with corresponding differential and linear probabilities that are vanishingly small. Formal AEAD security is ensured through an Encrypt-then-MAC (EtM) construction. Implementation on a Xilinx Artix-7 FPGA confirms practicality: NFBC achieves superior throughput-per-area compared to several NIST Round-2 lightweight candidates (SPOC, SPOOK, GIFT-COFB, ESTATE, SAEAES, Oribatida) and CAESAR finalists (Ascon-128, Ascon-small, CLOC-AES, SILC-AES). Estimated countermeasure overheads for masking and fault detection demonstrate feasibility against side-channel and fault attacks. These results confirm NFBC as a secure, efficient, and practically deployable lightweight cryptographic solution.