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<p>Quantum-dot cellular automata (QCA) technology represents a promising approach in quantum electronics and nanoscale digital systems. Nevertheless, QCA-based circuits continue to face challenges related to minimizing cell count, optimizing area efficiency, and reducing delay. This study proposes a novel D-latch with set and reset capabilities, along with a rising-edge-triggered D flip-flop featuring similar functionalities, and a compact 4-bit shift register. The proposed D flip-flop employs 28 cells, occupies an area of 0.02&#xa0;μm², and achieves a delay of 0.5 clock cycles. Similarly, the D-latch consists of 18 cells, occupies 0.01&#xa0;μm², and demonstrates comparable delay performance. Relative to previous designs, the proposed D-latch shows a 34.87% reduction in cell count and a 60% decrease in area, while the D flip-flop exhibits improvements of 44.5% and 55.6% in these metrics, respectively. These results suggest enhanced compactness and efficiency compared to selected existing works, supporting the potential for low-power, high-density circuit implementations within QCA technology. All simulations were conducted using QCA Designer version 2.0.3, following established QCA design principles.</p>

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A novel and optimized design of D-latch and D flip-flop for QCA-based digital systems

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2025年8月22日

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  • Pezhman Kiani Vosta,
  • Mohammad Gholami

摘要

Quantum-dot cellular automata (QCA) technology represents a promising approach in quantum electronics and nanoscale digital systems. Nevertheless, QCA-based circuits continue to face challenges related to minimizing cell count, optimizing area efficiency, and reducing delay. This study proposes a novel D-latch with set and reset capabilities, along with a rising-edge-triggered D flip-flop featuring similar functionalities, and a compact 4-bit shift register. The proposed D flip-flop employs 28 cells, occupies an area of 0.02 μm², and achieves a delay of 0.5 clock cycles. Similarly, the D-latch consists of 18 cells, occupies 0.01 μm², and demonstrates comparable delay performance. Relative to previous designs, the proposed D-latch shows a 34.87% reduction in cell count and a 60% decrease in area, while the D flip-flop exhibits improvements of 44.5% and 55.6% in these metrics, respectively. These results suggest enhanced compactness and efficiency compared to selected existing works, supporting the potential for low-power, high-density circuit implementations within QCA technology. All simulations were conducted using QCA Designer version 2.0.3, following established QCA design principles.