<p>This paper introduces a novel 13-level switched capacitor inverter. The proposed structure, comprising ten switches, five diodes, one input DC source, and five capacitors, can generate an alternating output voltage with a sixfold increase in the output load. The reduced number of switches lowers the cost of gate drivers, reducing the converter’s volume and increasing its power density. Additionally, it requires only five separate control signals, simplifying the control process. In addition to the advantage of six times voltage boosting and a low switch count, the capacitors’ automatic voltage balancing is considered a significant benefit for the proposed inverter. Also, the ripple and capacitor charging spike have been reduced by implementing a phase-shift modulation hybrid with an additional switching state. The circuit description, operating principles, hybrid pulse width modulation method, capacitor voltage ripple, and determination of the current-limiting inductor value and losses have been analyzed. The proposed structure has been compared with similar structures, and the performance of the proposed inverter has been assessed using simulation results, which experimental results have validated.</p>

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A hybrid phase-shifted PWM technique for a 13-level inverter with low switch count and suppressed charging spike

  • Hossein Mansourizadeh,
  • Majid Hosseinpour,
  • Ali Seifi,
  • Mahdi Shahparasti

摘要

This paper introduces a novel 13-level switched capacitor inverter. The proposed structure, comprising ten switches, five diodes, one input DC source, and five capacitors, can generate an alternating output voltage with a sixfold increase in the output load. The reduced number of switches lowers the cost of gate drivers, reducing the converter’s volume and increasing its power density. Additionally, it requires only five separate control signals, simplifying the control process. In addition to the advantage of six times voltage boosting and a low switch count, the capacitors’ automatic voltage balancing is considered a significant benefit for the proposed inverter. Also, the ripple and capacitor charging spike have been reduced by implementing a phase-shift modulation hybrid with an additional switching state. The circuit description, operating principles, hybrid pulse width modulation method, capacitor voltage ripple, and determination of the current-limiting inductor value and losses have been analyzed. The proposed structure has been compared with similar structures, and the performance of the proposed inverter has been assessed using simulation results, which experimental results have validated.