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Three-dimensional integration of two-dimensional field-effect transistors

  • Darsith Jayachandran,
  • Rahul Pendurthi,
  • Muhtasim Ul Karim Sadaf,
  • Najam U Sakib,
  • Andrew Pannone,
  • Chen Chen,
  • Ying Han,
  • Nicholas Trainor,
  • Shalini Kumari,
  • Thomas V. Mc Knight,
  • Joan M. Redwing,
  • Yang Yang,
  • Saptarshi Das

摘要

In the field of semiconductors, three-dimensional (3D) integration not only enables packaging of more devices per unit area, referred to as ‘More Moore’1 but also introduces multifunctionalities for ‘More than Moore’2 technologies. Although silicon-based 3D integrated circuits are commercially available35, there is limited effort on 3D integration of emerging nanomaterials6,7 such as two-dimensional (2D) materials despite their unique functionalities710. Here we demonstrate (1) wafer-scale and monolithic two-tier 3D integration based on MoS2 with more than 10,000 field-effect transistors (FETs) in each tier; (2) three-tier 3D integration based on both MoS2 and WSe2 with about 500 FETs in each tier; and (3) two-tier 3D integration based on 200 scaled MoS2 FETs (channel length, LCH = 45 nm) in each tier. We also realize a 3D circuit and demonstrate multifunctional capabilities, including sensing and storage. We believe that our demonstrations will serve as the foundation for more sophisticated, highly dense and functionally divergent integrated circuits with a larger number of tiers integrated monolithically in the third dimension.