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<p>Quantum random access memory (QRAM) enables efficient access to classical data for quantum computers and is a prerequisite for many quantum algorithms in achieving quantum speed-up. Despite various proposals, there have not been many experimental realizations of QRAM. Here we use a superconducting quantum processor to implement a circuit-based bucket-brigade QRAM, which uses a binary tree of quantum routers to enable efficient addressing of the stored information. To facilitate the experimental implementation, we introduce an efficient gate decomposition scheme for quantum routers, which effectively reduces the depth of the QRAM circuit compared with the conventional controlled-SWAP implementation. We further propose an error mitigation method to improve the query fidelity of the QRAM. With these techniques, we are able to experimentally implement the QRAM architectures for addressing four and eight classical bits, achieving query fidelities up to 0.809 ± 0.025 and 0.604 ± 0.005, respectively. Additionally, we study the error propagation mechanism and the scalability of our QRAM implementation, which provides experimental evidence for the noise resilience of the bucket-brigade architecture. Our results highlight the potential of superconducting quantum processors for realizing a scalable QRAM architecture.</p>

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A bucket-brigade quantum random access memory

  • 期刊论文

  • 发表日期：

    2026年3月16日

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  • Fanhao Shen,
  • Yujie Ji,
  • Debin Xiang,
  • Yanzhe Wang,
  • Ke Wang,
  • Chuanyu Zhang,
  • Aosai Zhang,
  • Yiren Zou,
  • Yu Gao,
  • Zhengyi Cui,
  • Gongyu Liu,
  • Jianan Yang,
  • Yihang Han,
  • Jinfeng Deng,
  • Anbang Wang,
  • Zhihong Zhang,
  • Hekang Li,
  • Qiujiang Guo,
  • Pengfei Zhang,
  • Chao Song,
  • Liqiang Lu,
  • Zhen Wang,
  • Jianwei Yin

摘要

Quantum random access memory (QRAM) enables efficient access to classical data for quantum computers and is a prerequisite for many quantum algorithms in achieving quantum speed-up. Despite various proposals, there have not been many experimental realizations of QRAM. Here we use a superconducting quantum processor to implement a circuit-based bucket-brigade QRAM, which uses a binary tree of quantum routers to enable efficient addressing of the stored information. To facilitate the experimental implementation, we introduce an efficient gate decomposition scheme for quantum routers, which effectively reduces the depth of the QRAM circuit compared with the conventional controlled-SWAP implementation. We further propose an error mitigation method to improve the query fidelity of the QRAM. With these techniques, we are able to experimentally implement the QRAM architectures for addressing four and eight classical bits, achieving query fidelities up to 0.809 ± 0.025 and 0.604 ± 0.005, respectively. Additionally, we study the error propagation mechanism and the scalability of our QRAM implementation, which provides experimental evidence for the noise resilience of the bucket-brigade architecture. Our results highlight the potential of superconducting quantum processors for realizing a scalable QRAM architecture.